EDA/CAD Software Engineer, Staff
Electrical Engineering
Manager
Asic Design
Cad Software
Clock Optimization
Design
Design Engineering
Electrical Design
Electronic Design Automation
Embedded Systems
Engineer
Engineering
Engineering Software
Fpga
Fpga Design
Hardware Engineering
Hardware Software Co Design
Hardware Software Co Design
Place And Route
Software Development
Software Engineer
Software Engineering
Systems
Systemverilog
Technical Lead
Job Description
Qualcomm is hiring a Staff EDA/CAD Software Engineer to build emulation CAD algorithms and optimize compute and storage for Qualcomm SoC needs.
Responsibilities
- Use industry-standard tools and technologies to deliver solutions across infrastructure needs
- Develop emulation CAD algorithms for Qualcomm SoC requirements, including:
- synthesis
- partitioning
- place and route
- clock optimization
- Drive compute and storage optimization
- Mentor and lead other team members
Requirements
- PhD in Science, Engineering, or related field
- 2+ years of ASIC design, FPGA design, verification, or related work experience
- 2+ years of C++ software development, CAD tool development, or related work experience
- 2+ years hands-on experience with Linux
- 2+ years direct hands-on experience with CAD software development, with proven software design principles, practices, and patterns
- Demonstratable knowledge of data structures, algorithms, and design patterns
- Experience relevant to:
- RTL Synthesis (System Verilog to Netlist)
- Clock Tree Optimization
- exposure to VLSI design concepts
- logic design
- Excellent interpersonal and analytical skills; ability to work independently and build customer-facing applications
- Experience with Git, LSF, JIRA, GCC, and related technologies
- Education/experience alternatives listed:
- Bachelor’s in Science, Engineering, or related field with 7+ years related experience
- Master’s degree in Computer Science, Computer Engineering (or Master’s/PhD as listed) plus additional ASIC-related experience
- PhD-level option with 2+ years ASIC design, verification, validation, or integration experience
Technologies
- C++, Linux, Git, LSF, JIRA, GCC
- System Verilog, RTL Synthesis
- Clock Tree Optimization
- ASIC design, FPGA design, emulation
- place and route, partitioning, clock optimization
Benefits
- Competitive annual discretionary bonus program
- Opportunity for annual RSU grants
- Highly competitive benefits package
Pay Range
- $145,600.00 - $218,400.00 annually
Qualcomm Technologies Inc’s Global CAD team develops tools, flows, and methodologies for different aspects of VLSI design, including work on critical CAD tools used in emulation.