Sr FPGA Firmware Developer

General Dynamics Mission Systems, Inc. is seeking a Senior FPGA Firmware Developer for the Torpedo Systems Group. This on-site role in Canonsburg, PA focuses on architecting, designing, developing, integrating, testing, and supporting custom FPGA firmware for a torpedo SONAR array and related electronic assemblies, with end-to-end ownership across the development lifecycle.

Key Responsibilities

• Architect, design, and document FPGA firmware hierarchies, components, interfaces, and data flows.
• Develop, simulate, and test firmware components in preparation for integration into target systems.
• Define FPGA timing, pinout, and placement constraints; review synthesis and timing reports and address resulting issues.
• Integrate and test firmware on target hardware using FPGA tools and laboratory equipment.
• Document failures, identify root causes, implement fixes, and maintain configuration management documentation.
• Deliver complex FPGA firmware solutions within a collaborative, cross-functional engineering team.
• Perform hands-on integration and debug of firmware on target hardware using industry-leading FPGA tooling and lab resources.
• Maintain end-to-end ownership of firmware components, covering detailed design through root cause analysis and configuration management.
• Coordinate with design, systems, and electrical engineering teams to support schematic updates and hardware rework.
• Identify opportunities to apply AI for continuous improvement and innovation.

Required Qualifications

• Bachelor’s degree in Electrical or Computer Engineering, or a related Science, Engineering, or Mathematics field, plus at least 2 years of relevant experience; or a Master’s degree plus 6 months of relevant experience.
• Department of Defense Secret security clearance is obtainable within a reasonable amount of time after hire; selected applicants will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information.
• U.S. citizenship is required due to the nature of work performed within company facilities.
• Experience implementing FPGA firmware, including custom VHDL components with state machines, synchronous/asynchronous logic, processes, and external interfaces.
• Understanding of underlying FPGA fabric and experience working across cross-clock boundaries.
• Familiarity with Xilinx (AMD) and/or Altera (Intel) compiler, programming, and debug tools.
• Experience reviewing schematics, parts lists, and rework documentation.
• Methodical, independent problem-solving and research skills.
• Familiarity with floor planning and timing optimizations.
• Working knowledge of standard network protocols such as IPv4, UDP, and TCP/IP.
• Experience implementing custom digital signal processing filters.

Technologies

• VHDL
• Xilinx (AMD) compiler
• Xilinx (AMD) programming tools
• Xilinx (AMD) debug tools
• Altera (Intel) compiler
• Altera (Intel) programming tools
• Altera (Intel) debug tools
• IPv4
• UDP
• TCP/IP

Work Location and Schedule

• Workplace: ON-SITE in Canonsburg, PA.
• Hybrid option: A hybrid schedule may be available, requiring a minimum of 3 days per week on-site.

Compensation

Annual salary range: USD 115,000 - 120,000.

Benefits

• 401k matching
• Flex time off
• Paid parental leave
• Healthcare benefits
• Health and wellness programs
• Employee resource and social groups
• Every other Friday off work, if desired (9/80 schedule)

Security Clearance Requirements

• Department of Defense Secret security clearance is obtainable within a reasonable amount of time after hire.
• Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information.
• U.S. citizenship is required due to the nature of work performed within company facilities.