Senior Staff Machine Learning Engineer

ValueBase Consulting is hiring a Senior Staff Machine Learning Engineer for an onsite, contract role in San Jose, CA. Join a team building an AI-enhanced security processor stack that goes end-to-end, from model development to silicon/NPU optimization, inference engines, embedded/firmware integration, and production deployment with hardware-aware performance tuning.

What you will work on

• Optimize training and inference performance across GPU and AI-accelerator infrastructure, including MLOps pipelines
• Design, train, and evaluate ML models (deep learning, LLM, CV, recommendation systems) and bring them into production
• Harden and extend NPU cores (for example, building on an open RVV/tensor core like CoralNPU) into production silicon
• Build or optimize inference engines and serving runtimes for real hardware constraints, focusing on latency, memory, and power
• Work below the application layer when needed, including BMC firmware, embedded Linux, or RTOS (for example, Zephyr), to ensure AI features run reliably on real systems
• Create automated test and verification harnesses that close the loop for AI-assisted RTL/DV, hardware bring-up, or manufacturing test
• Apply machine learning to security, including AI-driven log and intrusion analysis, AI-assisted penetration testing, or firmware/hardware security work
• Collaborate with RTL/hardware, firmware, and QA teams to ship AI features end-to-end, from training through deployment and monitoring

Core qualifications

• 8–10+ years of hands-on AI/ML experience; Master’s required (PhD preferred)
• Hands-on experience with AI/ML infrastructure and performance, including GPU clusters, distributed training, inference-serving optimization, and MLOps pipelines
• Model or algorithm development experience, including designing, training, and evaluating ML models
• Experience taking models into production, including feature engineering, data pipelines, and deployment
• AI chip or hardware-aware ML experience, such as optimizing inference engines for a specific chip or adapting model architecture/quantization to chip constraints
• Deep, hands-on expertise in at least 2 of the specialty areas below (not all five required)

• NPU / AI-ACCELERATOR: hardening or extending an NPU core into production silicon, mapping models onto MAC/tensor-engine constraints, or NPU-aware RTL/DV work
• SYSTEMS / SYS-LEVEL SOFTWARE: BMC firmware, embedded Linux, RTOS (e.g., Zephyr), or other low-level system software
• INFERENCE ENGINE / RUNTIME: built or materially optimized an inference engine or serving runtime against real hardware constraints
• TEST / VERIFICATION HARNESS: automated harness that closes a loop, such as an agent-driven RTL/DV test runner or a hardware bring-up/MFG test harness
• CYBER SECURITY: AI-driven log/intrusion analysis, AI-assisted penetration testing, or firmware/hardware security

Technologies you may work with

• GPU, AI-accelerator, MLOps pipelines, NPU
• open RVV/tensor core, CoralNPU
• BMC firmware, embedded Linux, RTOS, Zephyr
• AI-assisted RTL/DV, RTL/DV, LLM, CV

Role details

• Location: San Jose, CA, USA (onsite)
• Contract duration: 12 Months
• Compensation: $70/HR on W2 OR $80/HR on C2C
• Hiring constraints: Need candidates who are in California; W2 candidates are encouraged to apply; any visa is fine