Applied Machine Learning Engineer - AI for VLSI Design

NVIDIA’s Circuit Solutions Group is seeking an Applied Machine Learning Engineer to help build AI-driven software systems for VLSI and circuit design. This hybrid role in Santa Clara, CA focuses on applying modern machine learning techniques to electronic design automation challenges, from data-driven analysis to agentic AI solutions aimed at improving key outcomes.

You’ll collaborate with a multi-functional team working across pre-silicon and post-silicon custom circuit design efforts and related datasets, including areas such as circuit and layout optimization and Spice correlation. The work includes researching frontier EDA approaches and engineering models and algorithms that move toward the desired QOR.

What you’ll do

• Work with a cross-functional team on projects spanning Pre-silicon and Post Silicon custom circuit design and related data, including Circuit/Layout Optimization and Spice correlation
• Research and implement techniques from frontier solutions in electronic design automation
• Build and innovate agentic AI solutions for VLSI design problems
• Analyze problems and datasets, raise and validate hypotheses, and design and build models and algorithms until they achieve the target QOR

What you’ll bring

• MS (or equivalent experience) with 3+ years of experience, or PhD with 1+ years in Electrical/Computer Engineering
• Strict requirement experience in Combinatorial Optimization, Agentic AI and large language models, and Machine Learning for Chip Design & EDA
• Experience with Algorithms/Data Structures/Applied Math/Machine Learning/Software programming, with proven ability to write code in Python and C++
• Experience in Applied Math/Machine Learning/Software programming, with proven ability to write code in Python and C++

Technologies

• Python
• C++

Compensation

USD 152,000 - 264,500 per year.

Benefits

• Eligibility for equity and benefits

Ways to stand out

• Prior experience in large-scale EDA software development is a plus
• Prior experience in CMOS layout drawing, including schematic-to-layout translation and DRC/LVS compliance, is a definite plus
• Comfort working across multiple levels and teams across organizations (engineering/research, product, sales, and marketing)
• Effective verbal and written communication, including technical presentation skills
• Self-starter mindset with enthusiasm for continuous learning and sharing findings across the team